Surface codes on heavy-hex chips: why a better memory needs a fairer metric

Protecting information without copying its state

An ordinary storage system can save several copies of a file and compare them later. Unknown quantum states cannot be duplicated that way. Instead, a logical qubit spreads its information across a coordinated state of several physical qubits. Measurements inspect relationships between those qubits while avoiding a direct reading of the encoded answer. The resulting syndrome is a set of clues about errors, rather than a second copy of the information. This is why a functioning error-correction cycle requires both a quantum circuit and classical inference.

A useful small example is a repeated parity check. If neighboring binary values should agree, a disagreement tells an observer that something changed near that boundary. Several such disagreements can indicate a likely error location. Quantum codes need compatible checks for both bit changes and phase changes, because a state can preserve its measured zero-or-one probabilities while losing the relative phase that makes interference possible. Protecting only one kind of disturbance produces an incomplete quantum memory, even if that protected direction performs impressively.

A sparse chip makes geometry part of the experiment

The surface code is naturally described using a square arrangement of interacting qubits. Heavy-hex hardware has a different, sparser connectivity pattern. Information that the code expects to exchange directly may need an intermediate qubit or a routed operation. The July experiment combines a folding-and-unfolding implementation with pulses tailored to idle periods. The actual code comparisons extend distance three to rectangular distance pairs, three by five and five by three. They do not experimentally establish a fully expanded five-by-five memory with basis-independent improvement.

This geometrical mismatch has a general lesson. A drawing with twice as many useful elements is not automatically a machine with twice as much useful capability. Communication links and the time spent using them are physical resources. Imagine moving a fragile object between nearby shelves by carrying it through a narrow corridor. Adding shelves can increase storage capacity while lengthening every transfer. In a quantum processor, those transfers are gates, and even stationary qubits can accumulate unwanted phase while other parts of the schedule finish.

Why one improving direction does not settle the question

Consider an illustrative memory whose two independently measured error probabilities are 1 percent and 3 percent. Their arithmetic mean is 2 percent. Suppose a larger design changes them to 0.5 percent and 3.4 percent. The mean improves to 1.95 percent, but one class of stored states now performs worse. These invented numbers describe no particular chip; they show why an averaged score needs interpretation. A user who stores an arbitrary superposition cannot choose to care only about the direction that improved.

The researchers therefore examine entanglement fidelity and the assumptions behind simpler suppression-factor fits. They also distinguish errors in preparing and measuring a state from errors accumulated during repeated correction. A fixed initial mistake does not become a smaller physical process merely because the experiment runs for more cycles. Separating the starting offset from later deterioration is similar to distinguishing a thermometer's calibration error from random fluctuations in the measured room temperature. Both affect the result, but they call for different remedies.

Error suppression and error correction have to cooperate

Dynamical decoupling uses carefully scheduled control pulses to reduce particular unwanted evolutions during idle intervals. It is not a decoder discovering an error after the fact. It changes the physical exposure to noise before the syndrome is interpreted. The distinction matters when comparing code sizes: an optimized smaller memory can be a stronger baseline than a poorly controlled smaller memory. Adding a larger code to the latter can make scaling look better than it is once both implementations receive comparable care.

No pulse sequence cancels every disturbance. If the environment changes too quickly, a sequence can fail to refocus it; if the pulses themselves are inaccurate, extra pulses introduce extra errors. The control problem is therefore selective rather than unlimited. One can think of it as reducing predictable drift before asking a correction system to handle the remaining unpredictable events. This division of labor also explains why a single gate-error number rarely predicts a full memory experiment: correlated noise, leakage and the ordering of operations affect which error patterns occur together.

A protected memory is a starting point for computation

A separate preprint submitted on 1 July 2026 reports surface-code logical processing on a 107-qubit superconducting processor. Its distance-three patches undergo operations including merging, splitting and routing, with repeated syndrome extraction and no post-selection reported by the authors. That is a different experimental question from testing how memory error falls as distance increases. An apparatus can establish a useful operation at one distance without yet showing that the same operation becomes exponentially more reliable at larger distances.

The distinction becomes concrete in a long calculation. A memory benchmark asks whether a state survives a period of waiting. A computation must also move information, entangle logical qubits and introduce operations outside the easiest protected gate family. Each transition changes the relevant fault paths. A bridge that safely holds a parked truck still needs testing under moving traffic. Logical gates similarly require their own error accounting, especially when measurements change the shape or connectivity of the encoded information.

What would make the next scaling claim stronger?

The July heavy-hex paper estimates that a roughly 30 percent reduction in its calibrated noise model, together with suitable larger connectivity, would enable the isotropic comparison it could not perform directly. This is a conditional simulation result, not a measured improvement already delivered by the hardware. Such projections are useful because they identify a concrete engineering target. Their reliability depends on whether the modeled error channels, calibration stability and control schedule continue to describe the enlarged experiment.

My reading is that the strongest next milestone would combine several distances, both complementary storage bases, transparent preparation-and-readout treatment and a comparable level of physical optimization for every baseline. Repeating those comparisons across time would help expose rare events that a short calibration misses. Publishing the syndrome records and analysis choices would also let others ask whether an alternative decoder changes the conclusion. A reliable quantum computer will need impressive hardware, but its progress is easier to trust when the evidence remains precise about what improved, what was simulated and what has yet to scale.

Statistical uncertainty also belongs in this comparison. As an illustrative calculation, a measured failure fraction of 1 percent in ten thousand independent trials has an approximate standard error of 0.1 percentage points: the square root of 0.01 times 0.99 divided by ten thousand. That estimate assumes independent samples and a stable underlying probability. Slow drift or rare correlated bursts can make it too optimistic. Increasing the number of shots reduces ordinary counting uncertainty, but does not automatically remove a calibration bias or reveal events absent from the observation window. A convincing scaling plot should therefore make both its sampling uncertainty and its vulnerability to changing operating conditions visible.